Error (10334):VHDL error at frame.vhd(6):entity "frame" is u
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Error (10334):VHDL error at frame.vhd(6):entity "frame" is used but not de
library ieee;
use ieee.std_logic_1164.all;
entity reset is
\x05port(clear,frame,sychro:in std_logic;z:out std_logic);
end reset; --定义其实体的输入输出端
architecture seq of frame is
\x05signal flag:std_logic;
begin
\x05process(clk) --定义一个进行进程,以flag位标志
\x05begin --当flag=1时,提取一次帧同步信息
\x05\x05if falling_edge(clk) then --当flag=0时,不提取帧同步信息
\x05\x05\x05if reset='0' then
\x05\x05\x05\x05flag
library ieee;
use ieee.std_logic_1164.all;
entity reset is
\x05port(clear,frame,sychro:in std_logic;z:out std_logic);
end reset; --定义其实体的输入输出端
architecture seq of frame is
\x05signal flag:std_logic;
begin
\x05process(clk) --定义一个进行进程,以flag位标志
\x05begin --当flag=1时,提取一次帧同步信息
\x05\x05if falling_edge(clk) then --当flag=0时,不提取帧同步信息
\x05\x05\x05if reset='0' then
\x05\x05\x05\x05flag
你声明的设计实体名称是reset,那么在结构体声明中也应当采用reset.将“architecture seq of frame is”改为“architecture seq of reset is”.
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